RISC-V International

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This page gives an overview of upstream projects. If you miss information or find mistakes, please edit.



RISC-V Maintainers

FreeBSD has a weaker sense of maintainership than many open-source projects. However, the primary contributors are:

  • John Baldwin (SRI International)
  • Ruslan Bukin (University of Cambridge)
  • Jessica Clarke (University of Cambridge)
  • Mitchell Horne
  • Kristof Provost


FreeBSD major releases are approximately every two years, with minor releases every year and interim security patches as needed.

Previous releases:

  • FreeBSD 13.0 (2021-04-13) - RISC-V promoted to being a Tier 2 architecture
  • FreeBSD 12.2 (2020-10-27)
  • FreeBSD 12.1 (2019-11-4)
  • FreeBSD 12.0 (2018-12-11) - RISC-V added as a Tier 3 architecture

RISC-V Status

RV64G is supported for several popular hardware, emulated and FPGA-based platforms as a Tier 2 platform. Various feature additions and performance optimisation opportunities exist. See the upstream wiki page linked above for more details.


RISC-V Status

RISC-V support has been merged in FreeRTOS. A couple of boards is directly supported.


RISC-V Maintainers

  • Palmer Dabbelt
  • Albert Ou
  • Paul Walmsley


The Linux kernel has been merged mainline in the 4.15 merge window in November 2017.

Since then a range of Distributions have RISC-V ports. E.g.:

RISC-V Status

The Linux kernel supports RV64G as well as RV32G.



RISC-V Status

Work is in progress adding the port, with the first commit made on 23rd April 2021.

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