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RISC-V status

Two independent teams started working on the OpenJDK port.

The BishengJDK team is lead by Yadong Wang. They have published the first HotSpot JIT port for RV64G.

The PLCT team is lead by Ningning Shi.

Both teams are collaborating and working on a common RISC-V port.

The status of OpenJDK/HotSport RV64G (plus V v0.10) JIT porting could be found here. They are very optimistic to reach their 100x speed-up goal.

The OpenJDK RISC-V Port project has been approved by the openjdk community [1] and Fei Yang from Huawei Technologies is leading this new project now [2].

They have a project-specific repo for future development here [3].


This port supports RV64GV, shorthand for RV64IMAFDV ISA extensions, and covers the templateInterpreter, C1 and C2, excluding AOT/JVMCI. All existing GCs are

available on riscv64, including ZGC and ShenandoahGC. This port has passed jtreg tier{1,2,3,4} and jcstress tests on HiFive Unmatched board. SPECjbb & SPECjvm

benchmark tests are also carried out regularly. So it should be good enough to run most Java programs.


A JEP has been submitted in order to bring it upstream in JDK mainline [4], but that process will surely take some time.


[1] https://openjdk.java.net/projects/riscv-port

[2] https://openjdk.java.net/census#riscv-port

[3] https://github.com/openjdk/riscv-port/tree/riscv-port

[4] https://openjdk.java.net/jeps/8276797The working branch of an RV32G port of OpenJDK can be found here.

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