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Submissions of extensions to the Unpriv and Priv ICs for official Architecture Review and for Opcode/CSR Assignment Review (and official allocation) should be emailed to tech-opcode-and-consistency-review.  A row for your submission must also be added to the bottom of the Arch Review Status table below, and please fill in all fields except for the Status/ETA field. 

Arch Review Status Table
Extension NameIncluded Extensions
(e.g. Zkr, Zbk[bcx], ...)		Submitting TGContact(s) name and email
(Chair, Vice-chair, Architect, Editor, etc.)		StatusStatus Dateprojected completion date
primary reviewers names
Comments/blockers/next steps
Crypto ScalarZbk[bcx], Zkn[deh], Zksed, Zksh, Zkn, Zks, Zkt, ZkCrypto
Priv-related fast-track extensionsSmdisc, Sstc, Sscofpmf, SmstateenFast track

Greg Favor (gfavor@ventanamicro

Richard Newell (richard.newell@microchip

.com)

Derek Atkins

John Hauser (

datkins@veridify.com)
Ben Marshall (ben.marshall@bristol.ac.uk

jh.riscv@jhauser.us)

Submitted
29 June 2021Targeting 7/12, but John's timeline is tbd
VariousNext up
Andrew, John, Greg, and Krste
Full review
Debug 1.0DebugDebug

Tim Newsome (tim@sifive.com)
Paul Donahue (pdonahue@ventanamicro.com)

Submitted29 June 2021
Andrew, John, Greg, and Krste

Full review of just ISA chapters (i.e. 1, 2, 4, 5)

Pointer MaskingZjpmJ

Martin Maas (mmaas@google.com)
Adam Zabrocki (azabrocki@nvidia.com)

Submitted23 July 2021
Full review
Packed SIMDZpsfoperand, Zprvsfextra, Zpn, Zbp[??]PChuanhua Chang (chchang@andestech.com)Submitted24 June 2021
Andrew, John, Greg, and Krste

Full review


In addition to the extension spec, please submit information about the PoCs and about utility/efficiency (although we don't need all the gory detail - a paragraph or so for each can be fine).  For items considered to not be consequential, a sentence or so explaining why should suffice.

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