RISC-V International
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Submissions of extensions to the Unpriv and Priv ICs for official Architecture Review and for Opcode/CSR Assignment Review (and official allocation) should be emailed to tech-opcode-and-consistency-review. A row for your submission must also be added to the bottom of the Arch Review Status table below, and please fill in all fields except for the Status/ETA field.
Arch Review Status Table
| Extension Name | Included Extensions (e.g. Zkr, Zbk[bcx], ...) | Submitting TG | Contact(s) name and email (Chair, Vice-chair, Architect, Editor, etc.) | Status | Status Date | projected completion date | Comments/blockers/next steps |
|---|---|---|---|---|---|---|---|
| Priv-related fast-track extensions | Smdisc, Sstc, Sscofpmf, Smstateen | Fast track | Greg Favor (gfavor@ventanamicro.com) | Submitted | Various | Next up | Full review |
| Debug 1.0 | Debug | Debug | Tim Newsome (tim@sifive.com) | Submitted | 29 June 2021 | Full review of just ISA chapters (i.e. 1, 2, 4, 5) | |
| Pointer Masking | Zjpm | J | Martin Maas (mmaas@google.com) | Submitted | 23 July 2021 | Full review | |
| Packed SIMD | Zpsfoperand, Zprvsfextra, Zpn, Zbp[??] | P | Chuanhua Chang (chchang@andestech.com) | Submitted | 24 June 2021 | Full review |
...
Krste Asanovic <krste@berkeley.edu>
Andrew Waterman <andrew@sifive.com>
John Hauser <jh.riscv@jhauser.us>
Greg Favor <gfavor@ventanamicro.com>
Approved extensions:
Smepmp
Zba, Zbb, Zbc, Zbs (BitManip)
Zfh
Zfinx, Zdinx, Zhinx, Zhinxmin
Zbkb, Zbkc, Zbkx, Zknd, Zkne, Zknh, Zksed, Zksh, Zkr, Zkn, Zks (Scalar Crypto)
V (and several Zve* extensions)
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