RISC-V International
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This page gives an overview of upstream projects. If you miss information or find mistakes, please edit.
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ABIs, APIs, and other conventions
The main document for RISC-V ABI/ELF-related information is the RISC-V ELF psABI document, which can be found here: https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
An overview of other RISC-V ABI/API related documents can be found here: https://github.com/riscv/riscv-elf-psabi-doc/blob/master/README.md
The following RISC-V ABIs are currently defined:
- 32-bit
- ILP32, ILP32F, ILP32D, ILP32E
- 64-bit
- LP64, LP64F, LP64D, LP64Q, LP64E
Calling conventions
There are two calling conventions for GP registers in the RISC-V ecosystem:
- Standard ABI (sometime also called UABI): https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#integer-register-convention-
- EABI (targeting embedded systems): https://github.com/riscv/riscv-eabi-spec/blob/master/EABI.adoc
Default library path
The rich set of APIs has the consequence, that glibc's default library path includes a subdirectory for the actual ABI (e.g. "/usr/lib64/lp64d" for LP64D).
These default paths are defined here: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/riscv/configure.ac;
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Binutils
The GNU Binutils are a collection of binary tools (GNU linker, GNU assembler, many other excellent tools such as gprof).
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- Andrew Waterman (SiFive)
- Palmer Dabbelt (Google)
- Jim Wilson (SiFive)
- Nelson Chu (SiFiveRIVOSINC)
Releases
Rule of thumb: Binutils (GNU linker, GNU assembler, tons of other excellent tools) releases twice per year (mid July and mid January).
- Binutils 2.35 schedule:
- Binutils 2.35 (2020-07-24)
- Binutils 2.35.1 (2020-09-19) Binutils 2.35.2 (2021-01-3041 (30 Jul 2023)
- Binutils 2.36 schedule:Binutils 2.36 (2021-01-2440 (14 Jan 2023)
RISC-V status
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- RV32GC = RV32IMAFDC_Zicsr_Zifencei is implemented
- RV64GC = RV64IMAFDC_Zicsr_Zifencei is implemented
- Unratified extension support is kept in staging branches here: https://github.com/riscv/riscv-binutils-gdb
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GCC
The GNU Compiler Collection (GCC) includes front ends for C, C++, Objective-C, Fortran, Ada, Go, and D, as well as libraries for these languages (e.g. libstdc).
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- Andrew Waterman (SiFive)
- Palmer Dabbelt (GoogleRIVOSINC)
- Jim Wilson (SiFive)
- Kito Cheng (SiFive)
GCC RISC-V community meetings
- Schedule: biweekly, Thursday 7 am (PST), starting on Mar 11, 2021
- Organized by Wei Wu (PLCT)
- Public announcement: https://www.mail-archive.com/gcc@gcc.gnu.org/msg94197.html
RISC-V GCC Patchwork Sync meetings
- Schedule: weekly, Tuesday UTC +0 02:30 p.m, starting on 2023-04-18
- Organized by Palmer Dabbelt (RIVOSINC)
- Public announcement: https://docs.google.com/document/d/1bW2jgRmhYdHz7oVw5EUcXVAv4_cfuBaZ5bhVG1pUnIo
Releases
Rule of thumb: GCC closes the merge window for the next release in mid-November (once per year).
- GCC 11 14 schedule
- GCC 11 14 Stage 1 (starts 20202024-04-30)
- GCC 11 14 Stage 3 (starts 20202024-11-16)
- GCC 11 14 Stage 4 (starts 20212025-01-17)
- GCC 1114.1 release (not defined; possibly May/June)
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RV32G and RV64G are mostly implemented. However, there is still some optimization potential.
- RV32GC = RV32IMAFDC_Zicsr_Zifencei is implemented
- RV64GC = RV64IMAFDC_Zicsr_Zifencei is implemented
- RV32/64E is supported
- Supported calling conventions: ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d and lp64e
- GCC supports -msave-restore -mno-relax
- Unratified extension support is kept in staging branches here: https://github.com/riscv/riscv-gcc
- RISC-V specific command-line options: https://gcc.gnu.org/onlinedocs/gcc/RISC-V-Options.html
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GDB
GDB is the GNU Project debugger.
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At the time of writing the most recent release was 1014.1, released on 2020-10-24. Dates for branching (and hence release) of GDB 11 have yet to be announced12-03.
RISC-V status
Debugging works on top of PTRACE syscalls. HW-Breakpoint or HW-Watchpoint support is missing.
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Previous releases:
- glibc 2.32 38 (20202023-0807-0531)
- glibc 2.33 37 (20212023-02-01)
- glibc 2.34 36 (20212022-0807-0130)
RISC-V status
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- The following ABIs are supported:
- ILP32, ILP32D, LP64, LP64D
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LLVM
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
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- Schedule: biweekly, Thursday 8 am (PST), since Sept 2019
- Organized by Alex Bradbury (lowRISC) and Ana Pazos (Qualcomm)
- Public announcement: https://lists.llvm.org/pipermail/llvm-dev/2021-February/148345.html
Releases
- LLVM 12 17 schedule
- LLVM 1217.0.0 RC1 (branching) (2021-01-26)
- LLVM 12.0.0 RC2 (2021-02-23)
- LLVM 12.0.0 final (2021-03-02)
The upstream release page can be found here.
RISC-V status
- 6 (28 Nov 2023)
The upstream release page can be found here.
RISC-V status
- RV32GC = RV32IMAFDC_Zicsr_Zifencei is implemented
- RV64GC = RV64IMAFDC_Zicsr_Zifencei is implemented
- RV32E is not supported
- Some non-ratified extensions have been merged mainline (they need the flag -menable-experimental-extensions to enable them):
- Bitmanip v1.0
- b, zba, zbb, zbc, zbe, zbf, zbm, zbp, zbr, zbs, zbt, zbproposedc
- Vector v1.0
- Example command for building: clang --target=riscv64-unknown-elf -march=rv64gcv -menable-experimental-extensions
- Floating-point v0.1
- zfh
- Bitmanip v1.0
- LLVM supports -msave-restore -mno-relax
- RISC-V specific command-line options: https://clang.llvm.org/docs/ClangCommandLineReference.html#riscv
- LLVM's extension parsing code: https://github.com/llvm/llvm-project/blob/main/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
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Newlib
Newlib is a C standard library implementation intended for use on embedded systems.
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Rule of thumb: Newlib releases once per year.
Last releases:
- Newlib 34.3.0 (2020-01-22)
- Newlib 4.0.0 (2020-11-17)
- Newlib 4.1.0 (2020-12-1820 Jan 2023)
RISC-V status
RV32 and RV64 are supported. Still, there is optimization and completeness potential.
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