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Year-end 2023 Spec Development

This page serves as the starting point for understanding the status of specifications currently being developed by RISC-V.  This status is best represented as progress toward the key Specification Milestones (Plan, Freeze, and Ratification-ready) which are obtained sequentially.  Specific status for the relevant status columns is detailed in the Status Key section below.  The chairs and vice-chairs of Task Groups, specification authors, and Horizontal and ISA Committee chairs and vice-chairs jointly own ensuring their specifications are listed below and reflect accurate status.

In-process specifications are grouped below into two tables based on whether they impact the RISC-V ISA (In-process ISA Specifications) or not (In-process Non-ISA Specifications).  Items should have links to their respective specification repo (Image Added), Ratification Plan(Image Added) if not a Fast-track item, and an Acceptance Criteria Status checklist (Image Added). 

Completed specifications are tracked in the subsequent sections.

Status of active votes by TSC and Committee Chairs can be found on the RISC-V Vote Status wiki page.

This dashboard does NOT intend to show detailed status (that's available in the status checklist for the specification, Image Added), but rather the general status in the journey to ratification. 

NOTE: This page is managed by the RISC-V staff with assistance from each specification owner. To get updates to this page or for questions, contact help@riscv.org.

ISA Specification Status


Ratification Package 

: Project repo
: Plan doc
: Status chklist

extensions included


Task group approved by TSC date or Fast Track approved by AR dateSpecification State****ISA AR State++Fast TrackPriv / UnprivCommittee (Owner)Task GroupPlan Milestone Target DateFreeze Milestone Target DateRatification Milestone Target DatePlan
Milestone Next Step*
Freeze
Milestone Next Step**
Ratification
Milestone Next Step***
Last UpdatedNotesIn RVA2023 profile as mandatory or supported optionalMigrated to Jira?

Jira Link

Anchor
ABH_Row
ABH_Row
Byte and Half-word Atomics

Zabha

 

Stable

Approved

(10/10/23)

YU

Unpriv IC
(Ved)

N/AQ4'23Q4'23       Q1'25completeacceptance criteria completeStart

 

AR approved.
Jira Link

Anchor
BFloat16_Row
BFloat16_Row
Bfloat16


 

Zfbfmin, Zvfbfmin, Zvfbfwma
Public Review Complete

Approved

(7/15/23)

YU

Unpriv IC

(Ken Dockser)
N/AN/AQ2'23Q1'24N/AcompleteRatification Ready

 


YJira Link

Quality-of-Service (QoS) Identifiers

Ssqosid


StableApprovedYP

Priv IC

(Ved Shanbhogue)


N/A4Q'22Q2'23Q3'23completeacceptance criteria completeStart

 


AR approved
No

  

Anchor
CTR_Row
CTR_Row
Control Transfer Records

  

Smctr, Ssctr

 

Plan CompleteDevelopmentNP

Priv IC

(Beeman Strong)

CTR TGQ2'23Q3'23Q4'23completeacceptance criteria complete



Jira link

Anchor
Debug_Row
Debug_Row
Debug


  

Sdext, Sdtrig2020StableDevelopment

N

PPriv IC
(Tim Newsome)
Debug TGQ1'23Q2'23Q3'23complete

committee chair approval

start

Waiver vote for SAIL and ACT

nJira link

Anchor
FastInt_Row
FastInt_Row
Fast Interrupt 


  

Smclic, Ssclic, Suclic, Smclicshv, Smclicconfig2020Plan CompleteDevelopmentNPPriv IC
(Dan Smathers)
Fast InterruptsN/AQ3'23
N/A

spec development - stable

start


nJira link

Anchor
CSRIndir_Row
CSRIndir_Row
Indirect CSR Access


Smcsrind, Sscsrind
Public Review StartedApprovedYPPriv IC
(Beeman Strong)
N/AQ3'23

completecomplete

committee chair approval



Jira link

Anchor
Zjid_Row
Zjid_Row
Instruction/Data Consistency


Zjid2020StableDevelopmentNPPriv IC
(Martin Maas)
I/D ConsistencyN/AQ2'23
N/A - GrandfatheredAR approvalstart

Spec in slide form, needs to be translated into write-up.

?Jira link

Anchor
Zimop_Row
Zimop_Row
"May Be Ops" (for CFI, etc.) 


Zimop, Zcmop

 

Public Review CompleteDevelopmentYUUnpriv IC
(Andrew Waterman/Ved Shanbhogue)
N/AN/AQ2'23
N/A

complete

acceptance criteria complete


nJira Link

Anchor
PackedSIMD_Row
PackedSIMD_Row
Packed SIMD 


Zbpbo, Zpn, Zpsfoperand, P

2020

NewDevelopmentNUUnpriv IC
(Kevin Chen)
Packed SIMDQ3'23Q4'23Q4'23start

start


start

Need plan from Kevin ChennJira Link

Anchor
PointerMasking_Row
PointerMasking_Row
Pointer masking


 

Smmpm
Smnpm
Ssnpm
2020StableReworkingNPPriv IC
(Martin Maas)
Pointer MaskingQ1'23Q2'23
completeAR approvalstart

Ongoing discussion with ARC around design.?Jira Link

Anchor
Priv1_13_Row
Priv1_13_Row
Priv 1.13


  



NewDevelopmentNPPriv IC
(TBD)




build plan

Awaiting guidance from Greg and Andrew.yJira Link

Anchor
Smrnmi_Row
Smrnmi_Row
Resumable Non-maskable Interrupts 


Smrnmi

 

Plan  CompleteReviewingYPPriv IC
(Andrew Waterman)
N/AN/AQ1'23
N/Aacceptance criteria completestart

Status checklist reviewed by Philipp.  Work needed.  Requested owner from Greg and Andrew (Priv IC).nJira Link

Anchor
SSLP_Row
SSLP_Row
Shadow Stacks and Landing Pads


Zicfiss, Zicfilp


 

Plan  CompleteQueuedN U + P

Unpriv IC + Priv IC

(George, Ved)

SS-LP-CFI Q4'22Q3'23Q3'23Completeacceptance criteria completestart

AR approvednJira Link

Anchor
Sscdeleg_Row
Sscdeleg_Row
Supervisor Counter Delegation


 

Smcdeleg, Ssccfg

 

StableQueuedYPPriv IC
(Beeman Strong)
N/A
(Fast Track)
Q1'23Q2'23Q3'23Completecommittee chair approval

 



Jira Link

Anchor
SmMTT_Row
SmMTT_Row
Supervisor Memory Tracking Table (SmMTT)


Smsdid, Smmtt, Svpams, Smsdia

Plan CompleteDevelopmentNPPriv IC
(Ravi Sahita)

SmMTT

Q3'23Q4'23Q2'23

Complete

acceptance criteria complete



Jira Link

Anchor
SPMP_Row
SPMP_Row
S-mode PMP


Sspmp

 

Plan  CompleteDevelopmentNPSecurity HC
(Dong Du)
S-Mode Physical Memory ProtectionQ1'23Q3'23Q4'23CompleteStartN/A

Plan Milestone review 2/15nJira Link

Anchor
VCAllRounds_Row
VCAllRounds_Row
Vector Crypto - all-rounds AES


  

Zvknf

 

StableDevelopmentNU

Unpriv IC
(TBD)

Cryptographic Extensions3Q'22TBDYE2024CompleteAR Approvalstart

No owner to drive work.nJira Link

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