RISC-V International
All extensions shall go through the Opcode and State Review before progressing to the Freeze milestone as specified in the Definition of Done Policy
The Reviews (other than Opcode and State) that were previously performed by the O&CR are now performed by the overseeing (Un)Privileged ISA Committee prior to freeze. These include:
- Consistency with the RISC-V Architecture and philosophy
- Proof of Concept (PoC) – criteria for each extension to be decided by the IC on an extension-by-extension basis
- Utility and Efficiency (relative to all other instructions)
- Documentation
- Clarity
- Completeness - all cases fully defined
- Rationale for each instruction or closely related group
- Cost
- Size (gates)
- Timing (NAND2 FO4)
- Value – what the instructions replace
- Compartmentalization (e.g., normative separated from non-normative)
- No oversharing – no references to current implementations or usage which might be the IP of any entity other than the Member who has proposed the instruction
| TG/FT | Board Priority | Fast Track | Review | Contact | Extension | Sub Extensions | Complete | Status | Effort | ETA | Comment |
| BitManip | Yes | No | Final | Ken Dockser | B | Zba, Zbb, Zbc, Zbs | No | complete (except for doc updates) | s | 5/31/21 | ASCII doc for public review close to completion |
| BitManip | (Yes) | No | Final | Ken Dockser | B | (Scalar Crypto required instructions) Zbk? | No | started | m | 5/31/21 | |
| TEE | Yes | No | Final | Joe Xie | ePMP | N/A | No | in final review | m | 5/31/21 | |
| Crypto | Yes | No | Final | Ben Marshall | K | (Scalar) | No | started | m | 5/15/21 | Bitmanip crypto-required extensions (Zbk?) reviewed in parallel |
| Vector | Yes | No | Final | Krste | V | All except: Zvqmac and Zvediv | No | in queue | m-l | Needed for RVA22 | |
| Virtual Memory | Yes | No | Final | Dan Lustig | Base? | Svnapot | No | in queue | s | NAPOT Translation Contiguity | |
| Privileged | No | Yes | Final | Greg Favor | Sstc | hypervisor? Sys? | No | in queue | s | stimecmp / vstimecmp | |
| Packed-SIMD | Yes | No | Final | Chuanhua Chang | P | - | No | in queue | xl | ||
| Privileged | No | Yes | Final | Greg Favor | Sscofpmf | - | No | in queue | s | PerfMon Overflow and Mode Filtering | |
| TEE and J | No | No | Final | Adam Zabrocki | J | Pointer Masking | No | in queue | s | ||
| Zfinx | No | No | Final | Tariq Kurd | Zfinx | Zfinx | Yes | Not required | none | No new Opcodes or State | |
| Code Size Reduction | No | No | Early | Tariq Kurd | Zce | - | No | in queue | m | ||
| Debug | No | No | Final | Tim Newsome | Debug | N/A | No | in queue | s-m | Built on top of ratified 0.13 spec |
- Effort - amount of effort remaining in the review (s,m,l,xl)
- ETA- date for feedback (issues to be corrected) to proposer, or approval
- Contact Opcode and Consistency Review at: tech-opcode-and-consistency-review@lists.riscv.org
- Use the above address to submit a specification for review.
- Join the list: tech-opcode-and-consistency-review+subscribe@lists.riscv.org
- View past posts and other information at: https://lists.riscv.org/g/tech-opcode-and-consistency-review
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