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Project Name	Base Architecture	Level of implementation	Notes
Stand-alone functional units	RV32/64	Yosys Synthesis	Stand-alone functional-unit style implementations of the dedicated scalar crypto instructions. Free to use as "drop-ins" for prototyping.
scarv-cpu	RV32	Behavioural RTL simulation / Yosys Synthesis / FPGA	Completely Public/Open Source. Useful as a public baseline. Commercial implementations should aim to be better than this!
PQShield security core	RV32	(assumed) Behavioural RTL simulation. Running on FPGA.	Closed / commercial source. Most complete implementation of the entropy source.
Romain Dolbeau / VexRISC-V	RV32	Running on FPGA.	Uses VexRiscv core as a base. Completely independent implementation from scratch, outside the Crypto TG.
IQonIC Works RV32IC_P5	RV32?	In development	"implemented Zkn (...), along with selectable Zb* and Zkb. We also have an optional custom extension that does AES block encrypt/decrypt, and a bus-based AES/cipher-mode accelerator. Work in progress benchmarking them on FPGA to compare relative performance in accelerating crypto library functions."
croyde-riscv	RV64	Behavioural RTL simulation / Yosys Synthesis / FPGA	3-stage RV64 micro-controller. `rv64imck`. Free/Open source. Something commercial implementations should better. Implements everything except `ZKR`.

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