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NOTE: We have migrated our specification development tracking to Jira. The new All Specifications Under Development replaces the old table-based, static page.  Please see the "Historical Status" section for legacy information.

New Information

These links provide more information about specifications currently under development:

Any questions or problems should be sent to help@riscv.org or reported at help.riscv.org (GH issue repo which requires authorization and authentication).

Historical Status

The historical specification status, including the information know as the "Specification Dashboard" has been moved to the "Specification Status - Historical" page.  Please reference it for legacy information.

Table of Contents

Table of Contents

Overview

The RISC-V specification process is governed by the Ratification Policy and more concisely articulated in the Specification Lifecycle and Milestone Definitions presentation.  To help Task Group Chairs, Vice-chairs, and specification authors navigate this process, the RISC-V Lifecycle Guide has a whole section on "Specification Lifecycle" with an introductory section describing the process and subsections for each milestone that include step-by-step descriptions of the process.

This page serves as the starting point for understanding the status of specifications currently being developed by RISC-V.  This status is best represented as progress toward the key Specification Milestones (Plan, Freeze, and Ratification-ready) which are obtained sequentially.  Specific status for the relevant status columns is detailed in the Status Key section below.  The chairs and vice-chairs of Task Groups, specification authors, and Horizontal and ISA Committee chairs and vice-chairs jointly own ensuring their specifications are listed below and reflect accurate status.

In-process specifications are grouped below into two tables based on whether they impact the RISC-V ISA (In-process ISA Specifications) or not (In-process Non-ISA Specifications).  Items should have links to their respective specification repo (Image Removed), Ratification Plan(Image Removed) if not a Fast-track item, and an Acceptance Criteria Status checklist (Image Removed). 

Status of active votes by TSC and Committee Chairs can be found on the RISC-V Vote Status wiki page.

Completed specifications are tracked at the bottom of the page.

This dashboard does NOT intend to showed details status (that's available in the status checklist for the specification, Image Removed), but rather the general status in the journey to ratification. 

NOTE: This page is managed by the RISC-V staff with assistance from each specification owner. To get updates to this page or for questions, contact help@riscv.org.

In-process ISA Specification Status

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Ratification Package 

Image Removed: Project repo
Image Removed: Plan doc
Image Removed: Status chklist

extensions included

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Image Removed Image Removed Image Removed

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Q1'23

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complete

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committee chair approval

...

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  • Issue being worked with AR, 2-week internal review required
  • May also include RAS Cause Codes
  • Chapter 9 needs to go to public review with IOMMU
  • Indirect register feature should move into Priv Spec per ARC.

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Unpriv IC

...

 

...

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SOC Infrastructure HC (Eric Shiu, Ambika Krishnamoorthy)

...

 

...

Image RemovedImage RemovedImage Removed

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Unpriv IC

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complete

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TSC approval

...

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Ratification waiver granted for ACT

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Image RemovedImage Removed

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Unpriv IC
(Philipp)

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...

Image Removed

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TSC Approved

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complete

BoD approval

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...

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N

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acceptance criteria complete

...

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  • SAIL work late getting started
  • ACT work significant effort
  • Q2 freeze at risk

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Image Removed Image Removed Image Removed

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spec development - stable

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Image RemovedImage RemovedImage Removed

...

 

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acceptance criteria complete

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review by chairs

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Image Removed

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AR approval

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  • Andrew working with Ved and ARC on new design
  • Potential ABI impacts identified by ARC.

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Image Removed

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2020

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start

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Image RemovedImage Removed Image Removed

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Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa, Sscounterenw, Ssstateen, Sstvala, Sstvecd, Sstvecv, Ssu64xl, Svade, Svbare, Za128rs, Za64rs, Ziccamoa, Ziccif, Zicclsm, Ziccrse, Zic64b

...

 

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Q1'23

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complete

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TSC approval

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TSC Signoff ends 2/28.

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Image Removed Image Removed

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Unpriv IC + Priv IC

(George, Ved)

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...

Image Removed Image Removed

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...

 

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  • Needs TSC notification of Plan Milestone
  • Submitted to AR

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Image Removed Image Removed Image Removed

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...

...

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Zvks, Zvkn,

Zvkb, Zvkg, Zvknha, Zvknhb, Zvkns,  Zvksed, Zvksh, Zvkt

...

 

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Unpriv IC
(Ken Dockser)

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Q2'23

...

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  • SAIL & ACT Waiver
  • Working new extension for consistent time vector ops (Zvbb)

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Image Removed Image Removed Image Removed

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Unpriv IC
(TBD)

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...

Image Removed

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complete

...

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Blanket waiver

Public review completed 3/10.

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In-process Non-ISA Specification Status

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Ratification Package

Image Removed: Project repo
Image Removed: Plan doc
Image Removed: Status chklist

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Ratification
Milestone next step

***

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ISA  Infrastructure HC
(Allen Baum)

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...

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committee chair approval

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Security HC
(Paul Ku)

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...

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...

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...

 

...

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New

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complete

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complete

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No waivers

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...

...

 

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Applications & Tools HC
(eop Chen)

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...

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...

...

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...

 

Status Key

The following steps and associated next sequential steps for the milestones listed in the tables above may be parallelized at times, but are most simply thought of as a sequential set.  All previous steps are done.  For more details on each step,  see the RISC-V Lifecycle Guide section on "Specification Lifecycle" and it's specific subsections for each milestone, including step-by-step descriptions.

The usable Milestone next Steps are as follows:

* Plan Milestone next Steps:

  1. build plan
  2. review by chairs
  3. complete (nothing else to do)

** Freeze Milestone next step:

  1. start
  2. spec development - stable
  3. AR approval (ISA/SW AR)
  4. acceptance criteria complete (including waivers, or approval)
  5. committee chair approval
  6. freeze
  7. complete (nothing else to do)

*** Ratification Milestone next step (don't start until freeze is complete):

  1. start
  2. send out for public review
  3. public review complete
  4. acceptance criteria complete 
  5. committee chair approval
  6. TSC approval
  7. BOD approval
  8. ratified
  9. complete (nothing else to do)

++ ISA AR State (owner)

  1. Development (not ready for AR) (TG/IC)
  2. Queued (AR)
  3. Reviewing (AR)
  4. Reworking (if necessary as a result of the review after complete goes back to the queue) (TG/IC)
  5. Approved (AR)

NOTE: Some Milestone next steps may be marked as "N/A" for "Not Applicable" with an explanation after a trailing "-".  For example, "N/A - Grandfathered" means that the step was skipped due to the fact that the process changed after the step would have been completed and it has been "Grandfathered" in (meaning accepted as N/A) as acceptable.

**** Specification State values:

  1. New
  2. Plan Complete
  3. Stable
  4. Frozen
  5. Public Review Started
  6. Public Review Complete
  7. TSC Approved
  8. Ratified

Previously Ratified Specifications

2023

ISA Specifications

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Ratification Package 

Image Removed: Project repo
Image Removed: Plan doc
Image Removed: Status chklist

extensions included

...

...

 

...

...

Total Store Ordering

Image Removed

...

 

...

complete

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complete

...

...

Non-ISA Specifications

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Ratification Package

Image Removed: Project repo
Image Removed: Plan doc
Image Removed: Status chklist

...

Ratification
Milestone next step

***

...

Image Removed Image Removed Image Removed

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complete

...

complete

...

...

No waivers

2022

ISA Specifications

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Ratification Package (Extension names)

Image Removed: Project repo
Image Removed: Plan doc
Image Removed: Status chklist

...

...

 Ratification Complete

...

...

Unpriv HC
(Ved Shanbhogue)

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complete

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complete

...

Non-ISA Specifications

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Specification

Image Removed: Project repo
Image Removed: Plan doc
Image Removed: Status chklist

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Efficient Trace (E-Trace)

Image Removed Image Removed Image Removed

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SOC Infrastructure HC
(Gajinder Panesar)

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Ratification Complete

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  • No waivers
  • Needs copyright update

...

...

Privileged Software HC
(Kito Cheng, Jessica Clarke)

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complete

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complete

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11/7/22

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No waivers

...

Supervisor Binary Interface (SBI)

Image Removed Image Removed Image Removed

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Privileged Software HC
(Atish Patra)

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Ratification Complete

...

...

Ratification Complete

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2021

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N

...

Zfh, Zfhmin

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Sm1-12, Ss1-12, Sv57

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time cmp

...

Dan

...