RISC-V International
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Specification : Project repo | Committee (Owner) | Task Group | Plan Milestone Target Date | Freeze Milestone Target Date | Ratification Milestone Target Date | Plan Milestone next step* | Freeze Milestone next step** | Ratification *** | Last Updated | Notes |
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Software HC (Sunil VL) | Q2'22 | review by chairs | ||||||||
Security HC (Suresh Sugumar, Ravi Sahita) | AP-TEE | review by chairs | 8/22/22 | |||||||
ISA Infrastructure HC | Architecture Test SIG?? | review by chairs | ||||||||
SOC Infrastructure HC (Ved Shanbhogue, Perrine Peresse) | IOMMU | Q3'22 | complete | AR approval | 8/31/22 | |||||
IOPMP | Security HC | IOPMP | Q2'22 | review by chairs | 8/22/22 | |||||
SOC Infrastructure HC (Robert Chylla) | Nexus Trace | review by chairs | 8/22/22 | |||||||
review by chairs | ||||||||||
Privileged Software HC (Abner Chang) | Q2'22 | Q3'22 | complete | complete | public review complete | 9/6/22 |
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Privileged Software HC | psABI | Q2'22 | Q3'22 | complete | complete | BOD approval | 10/11/22 | No waivers | ||
Security HC (Suresh Sugumar, Ravi Sahita) | Security Model | plan review by chairs | 8/22/22 | |||||||
Privileged Software HC (Irma Flores-Mendoza | Unified Discovery | Q3'22 | plan review by chairs | 8/22/22 | ||||||
Privileged Software HC | plan review by chairs | |||||||||
Cache and Memory Controller QoS Register Interface (CMQRI) | SOC Infrastructure HC (Eric Shiu, Ambika Krishnamoorthy) | CMQRI | plan review by chairs |
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The following steps and associated next sequential steps for the milestones listed in the tables above may be parallelized at times, but are most simply thought of as a sequential set. All previous steps are done. They are as follows:
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