RISC-V International
Page History
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Ratification Package
| Task group approved by TSC date | Specification State**** | Committee (Owner) | Task Group | Plan Milestone Target Date | Freeze Milestone Target Date | Ratification Milestone Target Date | Plan Milestone next step* | Freeze Milestone next step** | Ratification *** | Last Updated | Notes | Migrated to Jira? Jira Link | ||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Stable | Privileged Software HC (Atish Patra & Sunil VL) | Platform Runtime Services | Q2'23 | Q3'23 | Q4'23 | complete | committee chair approval | Submitted for AR 6/1 | JIRA Link | ||||||||||
| Security HC | AP-TEE-IO | Jira Link | ||||||||||||||||
| 2020 | New | ISA Infrastructure HC | Architecture Test SIG | review by chairs |
| Need to identify the track of approvals and discussion given it was started back in 2018. | Jira Link | ||||||||||||
| Plan Complete | Privileged Software HC (Aaron Durbin) | BRS | Q2'23 | Q3'23 | Q4'23 | complete | spec development - stable |
| Jira Link | |||||||||
| Plan Complete | Security HC (Ravi Sahita, Guerney Hunt) | AP-TEE | Q1'23 | Q3'23 | Q4'23 | complete | spec development | Jira Link | ||||||||||
| New | Security HC | IOPMP | Q3'23 | Q3'23 | Q4'23 | review by chairs | First Plan Milestone presentation on May 10, with follow-up requested for June. | Jira Link | ||||||||||
| Stable | SOC Infrastructure HC (Robert Chyla) | Nexus Trace | Q1'23 | Q2'23 | Q3'23 | complete | AR approval | |||||||||||
| Plan Complete | Applications & Tools HC | RISC-V Vector C Intrinsics | complete | spec development - stable | ||||||||||||||
Stable | Privileged Software HC (Atish Patra & Sunil VL) | Platform Runtime Services | Q2'23 | Q3'23 | Q4'23 | complete | committee chair approval | Jira Link | |||||||||||
| New | Security HC (Paul Elliot, Xueyang "Terry" Wang) | Security Model | plan review by chairs | Jira Link | ||||||||||||||
| Plan Complete | Privileged Software HC (Irma Flores-Mendoza | Unified Discovery | Q3'22 | complete |
| Jira Link | ||||||||||||
RAS Error Record Interface (RERI) |
| Plan Approved | SoC Infrastructure HC (Greg Favor, Vedvyas Shanbhogue) | RERI (RAS Error-record Register Interface) | Jira Link |
Status Key
The following steps and associated next sequential steps for the milestones listed in the tables above may be parallelized at times, but are most simply thought of as a sequential set. All previous steps are done. For more details on each step, see the RISC-V Lifecycle Guide section on "Specification Lifecycle" and it's specific subsections for each milestone, including step-by-step descriptions.
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