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       Q1'25nHardware Updating of PTE A/D Bits 


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complete

Indirect CSR Access

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Instruction/Data Consistency

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"May Be Ops" (for CFI, etc.) 


Image Modified Image Modified

Zimop, ZcmopKevin Chen2020?yQ1 U + P22 Apr Submitted to ARSupervisor Counter Delegation

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  • Needs TSC notification of Plan Milestone
  • Submitted to AR

    Ratification Package 

    : Project repo
    : Plan doc
    : Status chklist

    extensions included


    Task group approved by TSC date or Fast Track approved by AR dateSpecification State****ISA AR State++Fast TrackPriv / UnprivCommittee (Owner)Task GroupPlan Milestone Target DateFreeze Milestone Target DateRatification Milestone Target DatePlan
    Milestone Next Step*
    Freeze
    Milestone Next Step**
    Ratification
    Milestone Next Step***
    Last UpdatedNotesIn RVA2023 profile as mandatory or supported optionalMigrated to Jira?

    Jira Link

    Anchor
    CASABH_RowCAS
    ABH_Row
    Atomic compare-Byte and -swap (CAS)

    Image RemovedImage Removed

    Zacas

    Half-word Atomics

    Zabha

    10 Apr  

    Public Review CompleteStable

    Approved

    (710/10/23)

    YU

    Unpriv IC
    (Ved

    , Greg

    )

    N/AQ2Q4'23Q3Q4'23Q4'23       Q1'25completeacceptance criteria complete BoD approval

    Start

     

    AR approved.
    Jira Link

    Anchor
    ABHBFloat16_RowABH
    BFloat16_Row
    Byte and Half-word Atomics

    Zabha

     

    Zfbfmin, Zvfbfmin, Zvfbfwma
    FrozenStable

    Approved

    (107/1015/23)

    YU

    Unpriv IC

    (VedKen Dockser)
    N/AQ4'23N/AQ2Q4'23
    N/Acompleteacceptance criteria completeStart

    14  

    AR approved.

    Jira Link

    Anchor
    BFloat16CMQRI_RowBFloat16
    CMQRI_Row
    Bfloat16Capacity and Bandwidth Controller QoS Register Interface (CBQRI)


    Image Modified Image Modified Image Modified

    Zfbfmin, Zvfbfmin, ZvfbfwmaFrozen

    Approved

    (7/15/23)

    YU

    Unpriv IC

    (Ken Dockser)
    N/ASsqosid

     

    Plan CompleteQueuedNP

    SOC Infrastructure HC (Eric Shiu, Ambika Krishnamoorthy)

    CBQRI4Q'22N/AQ2'23N/AQ3'23completeAR approval

    25 Oct

     

    Submitted to AR
    Jira Linklink
    Anchor
    CMQRI
    CTR_Row
    CMQRI
    CTR_Row
    Control Transfer Records

    Capacity and Bandwidth Controller QoS Register Interface (CBQRI)Image Modified Image Modified Image Modified

    SsqosidSmctr, Ssctr

     

    Plan CompleteQueuedDevelopmentNP

    SOC Infrastructure HC (Eric Shiu, Ambika Krishnamoorthy)

    CBQRI4Q'22

    Priv IC

    (Beeman Strong)

    CTR TGQ2'23Q3Q2'23Q3Q4'23completeAR approval

     

    Submitted to ARacceptance criteria complete



    Jira link

    Anchor
    CondOps
    Debug_Row
    CondOps
    Debug_Row
    Conditional OpsDebug


    Image Modified Image Added Image Modified

    Zicond

     

    TSC ApprovedApprovedYU

    Unpriv IC
    (Philipp)

    Sdext, Sdtrig2020Plan CompleteDevelopment

    N

    PPriv IC
    (Tim Newsome)
    Debug TGN/AQ1'23Q1Q2'23Q2Q3'23complete

    acceptance criteria complete

    BoD approval

    start

    Waiver vote for SAIL and ACT

    nJira link

    Anchor

    CTR

    FastInt_Row

    CTR

    FastInt_Row

    Control Transfer Records

    Fast Interrupt 


    Image Modified Image Modified Image Modified

    Smctr, SsctrSmclic, Ssclic, Suclic, Smclicshv, Smclicconfig2020 Plan CompleteDevelopmentNPPriv IC
    (Beeman StrongDan Smathers)
    CTR TGFast InterruptsN/AQ2'23Q3'23Q4'23completeacceptance criteria complete


    N/A

    spec development - stable

    start


    nJira link

    Anchor
    Zicntrpmf
    CSRIndir_Row
    Zicntrpmf
    CSRIndir_Row
    Counter Mode FilteringIndirect CSR Access


    Image Modified

    Image Removed Image Removed
    Smcntrpmf

    TSC ApprovedApprovedY

    Smcsrind, Sscsrind
    FrozenApprovedYPUPriv IC
    (Beeman Strong)
    N/AQ1'23Q2'23Q3'23

    completecomplete

    BoD approval

    November meeting

    send out for public review



    Jira linkJira Link
    ZjidSdext, Sdtrig2020Plan CompleteStableDevelopmentNPPriv IC
    (Tim NewsomeMartin Maas)
    Debug TGI/D ConsistencyN/AQ1'23Q2'23Q3'23complete

    acceptance criteria complete

    start

    Waiver vote for SAIL and ACT


    N/A - GrandfatheredAR approvalstart

    Spec in slide form, needs to be translated into write-up.

    ?Jira link

    Anchor
    FastInt
    Zimop_Row
    FastInt
    Zimop_Row
    Fast Interrupt"May Be Ops" (for CFI, etc.) 


    Image Modified Image Removed Image Modified

    Smclic, Ssclic, Suclic, Smclicshv, Smclicconfig2020Zimop, Zcmop

     

    FrozenPlan CompleteDevelopmentNYPUPriv Unpriv IC
    (Dan SmathersAndrew Waterman/Ved Shanbhogue)
    Fast InterruptsN/AN/AQ3Q2'23
    N/A

    spec development - stable

    start

    nJira link

    complete

    send out for public review

    • Andrew working with Ved and ARC on new design
    • Potential ABI impacts identified by ARC.
    nJira Link

    Anchor
    PackedSIMD_Row
    PackedSIMD_Row
    Packed SIMD
    Anchor
    Svadu_RowSvadu_RowSvadu

     

    Public Review CompleteApprovedYPPriv IC
    (Ved Shanbhogue)
    N/AN/AQ2'23Q3'23N/AZbpbo, Zpn, Zpsfoperand, P

    2020

    NewDevelopmentNUUnpriv IC
    (Kevin Chen)
    Packed SIMDQ3'23Q4'23Q4'23start

    start


    start

    Need plan from Kevin ChennJira Link

    Anchor
    PointerMasking_Row
    PointerMasking_Row
    Pointer masking


    Image AddedImage Added Image Added

    Ssnjpm, Smnjpm, Smmjpm2020StableReworkingN

    BoD approval

    yJira link
    Anchor
    CSRIndir_RowCSRIndir_RowSmcsrind, SscsrindFrozenApprovedYPPriv IC
    (Beeman StrongMartin Maas)
    N/APointer MaskingQ1'23Q2Q3'23
    completecomplete

    send out for public review

    Jira link
    Anchor
    Zjid_RowZjid_RowAR approvalstart

    Ongoing discussion with ARC around design.?Jira Link

    Anchor
    Priv1_13_Row
    Priv1_13_Row
    Priv 1.13


    Image Added Image Added Image Added



    NewZjid2020StableDevelopmentNPPriv IC
    (Martin MaasTBD)
    I/D ConsistencyN/AQ2'23N/A - GrandfatheredAR approvalstart

    Spec in slide form, needs to be translated into write-up.

    ?Jira link



    build plan

    Awaiting guidance from Greg and Andrew.yJira Link

    Anchor
    Smrnmi_Row
    Smrnmi_Row
    Resumable Non-maskable Interrupts
    Anchor
    Zimop_RowZimop_RowSmrnmi

     

    FrozenPlan  CompleteDevelopmentReviewingYUPUnpriv Priv IC
    (Andrew Waterman/Ved Shanbhogue)
    N/AN/AQ2Q1'23
    N/Aacceptance criteria completesend out for public review

    start

    Status checklist reviewed by Philipp.  Work needed.  Requested owner from Greg and Andrew (Priv IC)
  • Andrew working with Ved and ARC on new design
  • Potential ABI impacts identified by ARC.
    nJira Link

    Anchor
    PackedSIMD
    SSLP_Row
    PackedSIMD
    SSLP_Row
    Packed SIMD Shadow Stacks and Landing Pads


    Image ModifiedImage Modified Image Modified

    Zbpbo, Zpn, Zpsfoperand, P

    2020

    New

    Zicfiss, Zicfilp


     

    Plan  CompleteQueuedDevelopmentNU U + P

    Unpriv IC + Priv IC

    (

    George, Ved)

    Packed SIMDQ3'23SS-LP-CFI Q4'22Q3Q4'23Q4Q3'23startCompletestartAR approvalstart

    Feb

    Need plan from Kevin ChenSubmitted to ARnJira Link

    Anchor
    PointerMasking
    Sscdeleg_Row
    PointerMasking
    Sscdeleg_Row
    Pointer maskingSupervisor Counter Delegation


    Image ModifiedImage Modified Image Modified

    SsnjpmSmcdeleg, Smnjpm, SmmjpmSsccfg

     

    StableReworkingQueuedNYPPriv IC
    (Martin MaasBeeman Strong)
    Pointer MaskingN/A
    (Fast Track)
    Q1'23Q2'23completeAR approvalstartQ3'23Complete

    28

    Ongoing discussion with ARC around design.

     

    • Needs TSC notification of Plan Milestone
    • Submitted to AR

    Jira Link

    Anchor
    Priv1SmMTT_13_RowPriv1_13
    SmMTT_Row
    Priv 1.13Supervisor Memory Tracking Table (SmMTT)


    Image Modified Image Modified Image Removed Image Added

    Smsdid, Smmtt, Svpams, Smsdia

    Plan CompleteNewDevelopmentNPPriv IC
    (TBD)
    build plan

    Awaiting guidance from Greg and Andrew.Ravi Sahita)

    SmMTT

    Q3'23Q4'23Q2'23

    Complete

    acceptance criteria complete



    Jira Link

    Anchor
    Smrnmi
    SPMP_Row
    Smrnmi
    SPMP_Row
    Resumable Non-maskable Interrupts S-mode PMP


    Image Modified Image Added Image Modified

    Smrnmi
    Sspmp

    17 Oct  

    Plan  CompleteReviewingDevelopmentYNPSecurity HCPriv IC
    (Andrew WatermanDong Du)
    N/AN/AS-Mode Physical Memory ProtectionQ1'23Q3'23Q4'23CompleteStartN/Aacceptance criteria completestart

    Plan Milestone review 2/15Status checklist reviewed by Philipp.  Work needed.  Requested owner from Greg and Andrew (Priv IC).nJira Link

    Anchor
    SSLPVCAllRounds_RowSSLP
    VCAllRounds_Row
    Shadow Stacks and Landing PadsVector Crypto - all-rounds AES


    Image Modified Image Modified Image Modified

    Zvknf

    Zicfiss, Zicfilp

    11 Aug  

    Plan  CompleteStableQueuedDevelopmentNU

    Unpriv IC + Priv IC
    (George, VedTBD)

    SS-LP-CFI Cryptographic Extensions3QQ4'22Q3'23TBDYE2024Q3'23CompleteAR approvalApprovalstart

    No owner to drive work.nJira Link
    Anchor
    Sscdeleg_RowSscdeleg_RowSmcdeleg, Ssccfg

     

    StableQueuedYPPriv IC
    (Beeman Strong)
    N/A
    (Fast Track)
    Q1'23Q2'23Q3'23Complete

     


    In-process Non-ISA Specification Status

    Ratification Package

    Image Added: Project repo
    Image Added: Plan doc
    Image Added: Status chklist

    Task group approved by TSC dateSpecification State****Committee (Owner)Task GroupPlan Milestone Target DateFreeze Milestone Target DateRatification Milestone Target DatePlan
    Milestone next step*
    Freeze
    Milestone next step**

    Ratification
    Milestone next step

    ***

    Last UpdatedNotesMigrated to Jira?

    Jira Link

    Anchor

    SmMTT

    ACPI_FFH_Row

    SmMTT

    ACPI_FFH_Row

    Supervisor Memory Tracking Table (SmMTT)
    Smsdid, Smmtt, Svpams, Smsdia

    Plan CompleteDevelopmentNPPriv IC
    (Ravi Sahita)

    SmMTT

    Q3'23Q4'23Q2'23

    Complete

    acceptance criteria complete

    Jira Link AnchorSPMP_RowSPMP_RowS-mode PMP

    Image Removed Image Removed Image Removed

    Sspmp

     

    Plan  CompleteDevelopmentNPSecurity HC
    (Dong Du)S-Mode Physical Memory ProtectionQ1'23Q3'23Q4'23CompleteStartN/A

    Plan Milestone review 2/15nJira Link

    Public Review Complete

    Privileged Software HC
    (Atish Patra & Sunil VL)
    Platform Runtime ServicesQ2'23Q3'23Q4'23completecompletecommittee chair approval

    Submitted for AR 6/1JIRA Link

    Anchor
    AP_TEE_IO_Row
    AP_TEE_IO_Row
    AP-TEE-IO


    New

    Security HC
    (Samuel Ortiz, Jiewen Yao)

    AP-TEE-IO Q4'23Q1'24Q2'24complete


    Jira Link

    Anchor
    ACT_Row
    ACT_Row
    Architectural Test User Specification

    AnchorVCAllRounds_RowVCAllRounds_RowVector Crypto - all-rounds AES
    Zvknf

     

    StableDevelopmentNU

    Unpriv IC
    (TBD)

    Cryptographic Extensions3Q'22TBDYE2024CompleteAR Approvalstart

    No owner to drive work.nJira Link

    In-process Non-ISA Specification Status

    Migrated to Jira?
    Jira LinkACPI FFH

    Image Removed Image Removed Image Removed

    JIRA Q4Q124Q224Architectural Test User Specification


    Image Modified Image Modified Image Modified

    Boot & Runtime Services (BRS, formerly OS-A SEE)

    Image Removed Image Removed Image Removed

    23 Jun  

    15 Sept  Plan IOPMP

    Image RemovedImage RemovedImage Removed

    05  

    SBI V2

    Image Removed Image Removed Image Removed

    Security Model

    Image Removed Image Removed Image Removed

    Unified Discovery (Config)

    Image Removed Image Removed Image Removed

    RAS Error Record Interface (RERI)
    (Specification Managed via Jira)
    2020New

    ISA  Infrastructure HC
    (Allen Baum)

    Architecture Test SIG


    review by chairs

     

    Need to identify the track of approvals and discussion given it was started back in 2018.Jira Link

    Anchor
    OSASEE_Row
    OSASEE_Row

    Boot & Runtime Services (BRS, formerly OS-A SEE)


    Image Added Image Added Image Added

     

    Plan CompletePrivileged Software HC
    (Aaron Durbin)
    BRSQ2'23Q3'23Q4'23completespec development - stable

     


    Jira Link

    Anchor
    APTEE_Row
    APTEE_Row
    Confidential VM Extension (CoVE, formerly AP-TEE)


    Image Added Image Added Image Added

     

    Plan CompleteSecurity HC
    (Ravi Sahita, Guerney Hunt)
    AP-TEEQ1

    Ratification Package

    Image Removed: Project repo
    Image Removed: Plan doc
    Image Removed: Status chklist

    Task group approved by TSC dateSpecification State****Committee (Owner)Task GroupPlan Milestone Target DateFreeze Milestone Target DateRatification Milestone Target DatePlan
    Milestone next step*
    Freeze
    Milestone next step**

    Ratification
    Milestone next step

    ***

    Last UpdatedNotes
    Anchor
    ACPI_FFH_RowACPI_FFH_Row

    Public Review Complete

    Privileged Software HC
    (Atish Patra & Sunil VL)
    Platform Runtime ServicesQ2'23Q3'23Q4'23completecompletecommittee chair approval

    Submitted for AR 6/1spec development - stable

    Spec being updated to use language compatible with Supervisor DomainsJira Link

    Anchor
    AP
    IOPMP_
    TEE_IO_
    Row
    AP
    IOPMP_
    TEE_IO_
    Row
    AP-TEE-IO
    IOPMP


    Image AddedImage AddedImage Added

     

    New

    Security HC
    (

    Samuel Ortiz, Jiewen Yao

    Paul Ku)

    AP-TEE-IO IOPMPQ3'23Q3'23Q4'23complete

    Jira Link

    review by chairs



    First Plan Milestone presentation on May 10, with follow-up requested for June.Jira Link

    Anchor
    NexusTrace_Row
    NexusTrace_Row
    Nexus Trace
    Anchor
    ACT_RowACT_Row2020New

     

    StableSOC ISA  Infrastructure HC
    (Allen Baum)
    Architecture Test SIGreview by chairs

     

    Need to identify the track of approvals and discussion given it was started back in 2018.Jira LinkRobert Chyla)Nexus TraceQ1'23Q2'23Q3'23completeAR approval



    Anchor
    RVVCIntrinsics_Row
    RVVCIntrinsics_Row
    RVV C Intrinsics



    Image AddedImage AddedImage Added

    Anchor
    OSASEE_RowOSASEE_RowPlan CompletePrivileged Software

    Applications & Tools HC
    (

    Aaron Durbin)
    BRSQ2'23Q3'23Q4'23

    eop Chen)

    RISC-V Vector C Intrinsics


    complete

    spec development - stable


    24 May  

    Jira Link

    Anchor
    APTEESBI_V2_RowAPTEE
    SBI_V2_Row
    Confidential VM Extension (CoVE, formerly AP-TEE)SBI V2


    Image Modified Image Modified Image Modified

    Public Review Complete

    Security Privileged Software HC
    (Ravi Sahita, Guerney Hunt)
    AP-TEEAtish Patra & Sunil VL)Platform Runtime ServicesQ2Q1'23Q3'23Q4'23completespec development - stable

    Spec being updated to use language compatible with Supervisor DomainsJira Link

    complete

    committee chair approval


    Jira Link

    Anchor
    SecurityModel_Row
    SecurityModel_Row
    Security Model


    Image Added Image Added Image Added

    Anchor
    IOPMP_RowIOPMP_RowNewSecurity HC
    (Paul KuElliot, Xueyang "Terry" Wang)
    IOPMPQ3'23Q3'23Q4'23Security Model


    plan review by chairs

    First Plan Milestone presentation on May 10, with follow-up requested for June.


    Jira Link

    Anchor
    NexusTraceUnifiedDiscovery_RowNexusTrace
    UnifiedDiscovery_Row
    Nexus TraceUnified Discovery (Config)


    Image Modified Image Modified Image Modified

     

    StablePlan CompletePrivileged Software SOC Infrastructure HC
    (Robert Chyla)
    Nexus TraceQ1'23Irma Flores-MendozaUnified DiscoveryQ2'23
    Q3'2322
    completeAR approval

     


    Jira Link

    Anchor
    RVVCIntrinsics
    RERI_Row
    RVVCIntrinsics
    RERI_Row
    RVV C IntrinsicsRAS Error Record Interface (RERI)
    (Specification Managed via Jira)

    Plan CompleteApprovedSoC Infrastructure Applications & Tools HC
    (eop ChenGreg Favor,  Vedvyas Shanbhogue)
    RISC-V Vector C Intrinsicscomplete

    spec development - stable

    Anchor
    SBI_V2_RowSBI_V2_Row

    Public Review Complete

    Privileged Software HC
    (Atish Patra & Sunil VL)
    Platform Runtime ServicesQ2'23Q3'23Q4'23complete

    complete

    committee chair approval

    Jira Link
    Anchor
    SecurityModel_RowSecurityModel_Row

     

    NewSecurity HC
    (Paul Elliot, Xueyang "Terry" Wang)
    Security Modelplan review by chairs

    Jira Link
    Anchor
    UnifiedDiscovery_RowUnifiedDiscovery_Row

     

    Plan CompletePrivileged Software HC
    (Irma Flores-Mendoza
    Unified DiscoveryQ3'22complete

     

    Jira Link
    Anchor
    RERI_RowRERI_Row

     

    Plan ApprovedSoC Infrastructure HC
    (Greg Favor,  Vedvyas Shanbhogue)
    RERI (RAS Error-record Register Interface)Jira Link

    Status Key

    The following steps and associated next sequential steps for the milestones listed in the tables above may be parallelized at times, but are most simply thought of as a sequential set.  All previous steps are done.  For more details on each step,  see the RISC-V Lifecycle Guide section on "Specification Lifecycle" and it's specific subsections for each milestone, including step-by-step descriptions.

    The usable Milestone next Steps are as follows:

    * Plan Milestone next Steps:

    1. build plan
    2. review by chairs
    3. complete (nothing else to do)

    ** Freeze Milestone next step:

    1. start
    2. spec development - stable
    3. AR approval (ISA/SW AR)
    4. acceptance criteria complete (including waivers, or approval)
    5. committee chair approval
    6. freeze
    7. complete (nothing else to do)

    *** Ratification Milestone next step (don't start until freeze is complete):

    1. start
    2. send out for public review
    3. public review complete
    4. acceptance criteria complete 
    5. committee chair approval
    6. TSC approval
    7. BOD approval
    8. ratified
    9. complete (nothing else to do)

    ++ ISA AR State (owner)

    1. Development (not ready for AR) (TG/IC)
    2. Queued (AR)
    3. Reviewing (AR)
    4. Reworking (if necessary as a result of the review after complete goes back to the queue) (TG/IC)
    5. Approved (AR)

    NOTE: Some Milestone next steps may be marked as "N/A" for "Not Applicable" with an explanation after a trailing "-".  For example, "N/A - Grandfathered" means that the step was skipped due to the fact that the process changed after the step would have been completed and it has been "Grandfathered" in (meaning accepted as N/A) as acceptable.

    **** Specification State values:

    1. New
    2. Plan Complete
    3. Stable
    4. Frozen
    5. Public Review Started
    6. Public Review Complete
    7. TSC Approved
    8. Ratified

    Previously Ratified Specifications

    2023

    ISA Specifications

    Status Key

    The following steps and associated next sequential steps for the milestones listed in the tables above may be parallelized at times, but are most simply thought of as a sequential set.  All previous steps are done.  For more details on each step,  see the RISC-V Lifecycle Guide section on "Specification Lifecycle" and it's specific subsections for each milestone, including step-by-step descriptions.

    The usable Milestone next Steps are as follows:

    * Plan Milestone next Steps:

    1. build plan
    2. review by chairs
    3. complete (nothing else to do)

    ** Freeze Milestone next step:

    1. start
    2. spec development - stable
    3. AR approval (ISA/SW AR)
    4. acceptance criteria complete (including waivers, or approval)
    5. committee chair approval
    6. freeze
    7. complete (nothing else to do)

    *** Ratification Milestone next step (don't start until freeze is complete):

    1. start
    2. send out for public review
    3. public review complete
    4. acceptance criteria complete 
    5. committee chair approval
    6. TSC approval
    7. BOD approval
    8. ratified
    9. complete (nothing else to do)


    ++ ISA AR State (owner)

    1. Development (not ready for AR) (TG/IC)
    2. Queued (AR)
    3. Reviewing (AR)
    4. Reworking (if necessary as a result of the review after complete goes back to the queue) (TG/IC)
    5. Approved (AR)



    NOTE: Some Milestone next steps may be marked as "N/A" for "Not Applicable" with an explanation after a trailing "-".  For example, "N/A - Grandfathered" means that the step was skipped due to the fact that the process changed after the step would have been completed and it has been "Grandfathered" in (meaning accepted as N/A) as acceptable.


    **** Specification State values:

    1. New
    2. Plan Complete
    3. Stable
    4. Frozen
    5. Public Review Started
    6. Public Review Complete
    7. TSC Approved
    8. Ratified


    Previously Ratified Specifications

    2023

    ISA Specifications

    extensions included

    Jira link

    Ratification Package 

    Image Added: Project repo
    Image Added: Plan doc
    Image Added: Status chklist

    extensions included


    Task group approved by TSC dateSpecification State****ISA AR State++Fast TrackPriv / UnprivCommittee (Owner)Task GroupPlan Milestone Target DateFreeze Milestone Target DateRatification Milestone Target DatePlan
    Milestone Next Step*
    Freeze
    Milestone Next Step**
    Ratification
    Milestone Next Step***
    Last UpdatedNotesIn RVA2023 profile as mandatory or supported optionalJira link

    Anchor
    CondOps_Row
    CondOps_Row
    Conditional Ops


    Image AddedImage Added

    Zicond

     

    RatifiedApprovedYU

    Unpriv IC
    (Philipp)

    N/AQ1'23Q1'23Q2'23completecomplete

    complete



    Jira link
    Svadu

     

    RatifiedApprovedYPPriv IC
    (Ved Shanbhogue)
    N/AN/AQ2'23Q3'23N/A

    complete


    complete


    yJira link

    Anchor
    Zicntrpmf_Row
    Zicntrpmf_Row
    Counter Mode Filtering


    Image Added Image Added Image Added
    Smcntrpmf

    RatifiedApprovedYUPriv IC
    (Beeman Strong)
    N/AQ1'23Q2'23Q3'23

    complete

    complete

    complete



    Jira Link

    Anchor
    CAS_Row
    CAS_Row
    Atomic compare-and-swap (CAS)


    Image AddedImage Added

    Zacas

     

    Ratified

    Approved

    (7/10/23)

    YUUnpriv IC
    (Ved, Greg)
    N/A

    Q2'23

    Q3'23Q4'23complete

    complete

     complete



    Jira Link

    Ratification Package 

    Image Removed: Project repo
    Image Removed: Plan doc
    Image Removed: Status chklist

    Task group approved by TSC dateSpecification State****ISA AR State++Fast TrackPriv / UnprivCommittee (Owner)Task GroupPlan Milestone Target DateFreeze Milestone Target DateRatification Milestone Target DatePlan
    Milestone Next Step*
    Freeze
    Milestone Next Step**
    Ratification
    Milestone Next Step***
    Last UpdatedNotesIn RVA2023 profile as mandatory or supported optional

    Anchor
    VectorCrypto_Row
    VectorCrypto_Row
    Vector Crypto


      

    Zvbb, Zvbc, Zvkb, Zvkg, Zvkn, Zvknc, Zvkned, Zvkng, Zvknha, Zvkbnhb, Zvks, Zvksc, Zvksed, Zvksg, Zvksh, Zvkt

     

    RatifiedApprovedNU

    Unpriv IC
    (Ken Dockser)

    Cryptographic Extensions3Q'22Q2'23

    Q2'23

    CompleteComplete

    Complete


    yJira Link

    Anchor
    Zfa_Row
    Zfa_Row
    Additional Scalar FP


    Zfa

     

    RatifiedApprovedYUUnpriv IC
    (Andrew Waterman)
    N/AN/AQ2'23Q3'23N/AComplete

    Complete


    yJira Link

    Anchor
    AIA_Row
    AIA_Row
    Advanced Interrupt Architecture (AIA)


      

    Smaia, Ssaia

     

    RatifiedApprovedNPPriv IC
    (John Hauser, Anup Patel)
    AIA1Q'22Q4'22

    Q2'23

    complete

    complete

    complete


    yJira Link

    Anchor
    Zvfh_Row
    Zvfh_Row
    Vector IEEE FP16 Min Support, Arithmetic


    Zvfh, Zvfhmin

     

    RatifiedApprovedYUUnpriv IC
    (Krste)
    N/AN/AQ4'22Q2'23N/A

    complete

    complete

    Blanket waiver

    yJira Link

    Anchor
    Zihintntl_Row
    Zihintntl_Row
    Non Temporal Locality Hint



    Zihintntl

     

    RatifiedApprovedYUPriv IC
    (Andrew Waterman)
    N/AN/AQ2'23
    N/Acomplete

    complete


    y

    Anchor
    CodeSize_Row
    CodeSize_Row
    Code Size Reduction 


    Zca, Zcb, Zcd, Zce, Zcf, Zcmp, Zcmt2021RatifiedApprovedNU

    Unpriv IC

    (Tariq Kurd)
    Code Size ReductionN/AQ1'23Q2'23N/A

    complete

    complete


    y (Zcb only)

    Anchor
    Counters_Row
    Counters_Row
    Counters


    Zicntr, Zihpm

     

    Ratified

    ApprovedYUUnpriv IC
    (Earl Killian)
    N/AN/AQ4'22Q1'23N/A

    complete

    complete



    y

    Anchor
    Profiles_Row
    Profiles_Row
    Profiles


      

    Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa, Sscounterenw, Ssstateen, Sstvala, Sstvecd, Sstvecv, Ssu64xl, Svade, Svbare, Za128rs, Za64rs, Ziccamoa, Ziccif, Zicclsm, Ziccrse, Zic64b

     

    RatifiedApprovedNUTSC
    (Krste/Greg)
    Profiles TGQ2'22Q4'22

    Q1'23

    complete

    complete

     

    complete


    y
    RV32E/RV64E

     

    Ratified
    YUUnpriv IC
    (krste)
    N/AN/AQ3'22Q4'22N/Acompletecomplete


    n

    Total Store Ordering

    Ztso

     

    Ratified
    YUUnpriv IC
    (Earl Killian)
    N/AN/AQ3'22Q4'22N/A

    complete

    complete


    ?

    ...