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Comment: added ABI extensions

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Project NameBase ArchitectureLevel of implementationNotes
area-optimized coreRV32/64

RTL simulation, FPGA Implementation, Synthesis

closed / commercial source   https://www.seagate.com/innovation/risc-v/
high-performance coreRV32RTL simulation, FPGA Implementation, Synthesisclosed / commercial source   https://www.seagate.com/innovation/risc-v/




















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Project/MaintainerDescription






ABI Extensions

  • TBDRegular C function that save/restores all caller-save registers
  • Inline handler gcc interrupt attribute to always callee-save every register (save as you go)
  • EABI Task Group - improve interrupt latency by reducing the number of caller-save registers