Table of Contents

Status at a glance:

Current Definition-of-Done Status: Stable
Next Definition-of-Done Status:: Freeze
- (allows start of formal public review period)

...

Scalar Crypto Specification:

...

Project Name	Base Architecture	Level of implementation	Notes
scarv-cpu	RV32	Behavioural RTL simulation. Running on FPGA. Post yosys synthesis results.	Completely Public/Open Source. Useful as a public baseline. Commercial implementations should aim to be better than this!
PQShield security core	RV32	(assumed) Behavioural RTL simulation. Running on FPGA.	Closed / commercial source. Most complete implementation of the entropy source.
Romain Dolbeau / VexRISC-V	RV32	Running on FPGA.	Uses VexRiscv core as a base. Completely independent implementation from scratch, outside the Crypto TG.

We still need a RV64 implementation.
- I (Ben) am working on adding support to a toy core of mine, but I don't have much time to dedicate to this.
Barry Spinney has offered to do advanced node synthesis runs for open source implementations.
- I (Ben) intend to take him up on this when I get time. No idea when that will be.

...