Overall Approved Definition-of-Done Status:  Stable

Next Major Definition-of-Done Milestone:  Freeze (allows start of formal public review period)

Scalar Crypto Specification:

Lightweight instruction set extensions for RV32 and RV64 HARTs.  Proposed extensions:

• Extensions fully defined in the Scalar Crypto Specification:  K, Zkn, Zks, Zkr, Zkne, Zknd, Zknh, Zkse, Zksd, Zksh
• Shared with the Bit-Manipulation Specification: Zkg, Zkb

Status by Topic:

Specification

• Stable
• What's next:
  • Needs translation into ASCIIDOC
  • Incorporate results of OpCode consistency review, once available

Every topic section:

Status (what's done, and not done), and What's next

links to GitHub, etc., as relevant to each of the topics here

links to PLTC and IIT Madras status pages, TBD

OpCode Encoding/OpCode consistency review

• Opcodes and encodings proposed
• Instruction extensions (instruction groupings) proposed
• Submitted to review task group
• The Bit-Manipulation shared subsets are being reviewed first as part of Bit-Manipulation specification review
  • Proposed as Zkg (clmul) and Zkb (specific crypto-required bit-manipulation commands)
• Proposed Scalar Crypto-unique subsets next in line for review:
  
  • K (Krypto): 
    • Zkn (full NIST Suite):  ZKne (NIST encrypt suite), ZKnd (NIST decrypt suite), ZKnh (NIST hash suite)
    • Zkr (random entropy source)
  • Zks (full ShangMi Suite):  Zkse (SM encrypt suite), Zksd (SM decrypt suite), Zksh (SM hash suite)

• OpCode and Consistency Review page
• What's next:  Respond to OpCode and Consistency Review comments, once available, and achieve consensus on any changes

Architecture Tests

• (Status)
• What's next:  

ABI Extensions

• None required

GCC and Assembler

• (Intrinsics)

LLVM

SAIL

Spike

QMU

Proof-of-Concept

• RV32
  • (project name/link)
  • (extensions verified)
  • level of verification achieved (behavioral RTL/simulation, synthesized RTL/area-&-timing, actual silicon, etc.)
• RV64